1. Field of the Invention
The invention relates in general to a frame maintaining circuit and a frame maintaining method, and more particularly to a frame maintaining circuit and a frame maintaining method for preventing an erroneously frame from being displayed.
2. Description of the Related Art
FIG. 1 shows a schematic diagram of a conventional display apparatus; FIG. 2 shows a signal timing diagram of a conventional display apparatus. A conventional display apparatus 1 includes a panel 11, a scan driver 14, a data driver 15 and a timing controller 16. The scan driver 14 includes a plurality of scan driving integrated circuits 142. The data driver 15 includes a plurality of data driving integrated circuits 154. The timing controller 16 outputs clock signals CLK and YCLK, an output enabling signal YOE (or referred to as a gate control signal), a data signal DATA and a data loading signal LD (or referred to as a source control signal). The timing controller 16 further controls the scan driving integrated circuits 142 to output a plurality of scan signals G(1) to G(N), and controls the data driving integrated circuits 154 to output a data signal DATA.
However, an unusual status such as electrostatic discharge (ESD) and power noise may easily cause data error to the data driver 15. In addition, the unusual status may also cause the scan driver 34 to output erroneous scan signals. For example, when an unusual status 20 occurs in the data signal DATA of data driver 15 in a data period T4, the data loading signal LD controls the data driver 15 to load the data signal DATA affected by the unusual status 20 to the data lines of the panel 31 in a loading period T5. Since the corresponding scan signal G(2) is transformed into an enabling level, an erroneous frame is then displayed on the panel 11.